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  ? semiconductor components industries, llc, 2006 may, 2006 ? rev. 15 1 publication order number: cs9201/d cs9201 micropower 5.0 v, 100 ma low dropout linear regulator with nocap  the cs9201 is a precision 5.0 v, 100 ma voltage regulator with low quiescent current (450  a typ @ 100  a load). the 5.0 v output is accurate within 2% and supplies 100 ma of load current with a maximum dropout voltage of only 600 mv. the regulator is protected against reverse battery, short circuit, over voltage, and over temperature conditions. the device can withstand 74 v peak transients making it suitable for use in automotive environments. on?s proprietary nocap solution is the first technology which allows the output to be stable without the use of an external capacitor. nocap is suitable for slow switching or steady loads. features ? nocap ? low quiescent current (450  typ @ 100  a load) ? 5.0 v, 2% output ? 100 ma output current capability ? fault protection ? 74 v peak transient voltage ? ?15 v reverse voltage ? short circuit ? thermal shutdown ? overvoltage shutdown ? internally fused leads ? pb?free packages are available current source (circuit bias) voltage shutdown over nocap current limit sense thermal shutdown bandgap reference v out sense* gnd v in + ? error amplifier *contact factory for optional sense lead. figure 1. block diagram device package shipping ? ordering information cs9201ydf8 soic?8 98 units/rail cs9201ydfr8 2500/tape & ree l soic?8 so?8 df suffix case 751 1 8 nc nc gnd gnd gnd gnd v in v out pin connections and marking diagram cs9201 = device code a = assembly location l = wafer lot y = year w = work week  = pb?free package cs920 alyw1  18 CS9201YDF8G soic?8 (pb?free) 98 units/rail cs9201ydfr8g 2500/tape & ree l soic?8 (pb?free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. http://onsemi.com
cs9201 http://onsemi.com 2 maximum ratings parameter value unit power dissipation internally limited ? input voltage (v in ): dc peak transient voltage (60 v load dump @ v in = 14 v) ?15 to 36 74 v v output current internally limited ? esd susceptibility (human body model) 4.0 kv package thermal resistance junction?to?case, r  jc junction?to?ambient, r  ja 25 110 c/w c/w junction temperature ?40 to +150 c storage temperature ?55 to +150 c lead temperature soldering: reflow (smd styles only) (note 1) 230 peak c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. 60 second maximum above 183 c. electrical characteristics (6.0 v v in 26 v, i out = 1.0 ma, ?40 c t j 125 c; unless otherwise stated.) parameter test conditions min typ max unit output stage output voltage, v out 9.0 v < v in < 16 v, 100 ua i out 100 ma 6.0 v < v in < 26 v, 100 ua i out 100 ma 4.90 4.85 5.00 5.00 5.10 5.15 v v dropout voltage (v in ?v out ) i out = 100 ma i out = 100  a ? 400 100 600 150 mv mv load regulation v in = 14 v, 100  a i out 100 ma ? 5 50 mv line regulation 6.0 v < v < 26 v, i out = 1.0 ma ? 5 50 mv quiescent current, (i q ) i out = 100  a, v in = 12 v i out 50 ma i out 100 ma ? 450 4 12 750 6 20  a ma ma ripple rejection 7.0 v vi n 17 v, i out = 100 ma, f = 120 hz 60 75 ? db current limit ? 105 200 ? ma short circuit output current v out = 0 v 25 125 ? ma thermal shutdown (note 2) ? 150 180 ? c overvoltage shutdown v out 1.0 v 28 32 36 v 2. this parameter is guaranteed by design, but not parametrically tested in production. package lead description package lead number lead symbol function soic?8 1 v out 5.0 v, 2%, 100 ma output 4, 5 nc no connection 2, 3, 6, 7 gnd ground 8 v in input voltage
cs9201 http://onsemi.com 3 typical performance characteristics 20 18 16 14 12 10 8 6 4 2 0 ?2 100 90 80 70 60 50 40 30 20 10 0 output current (ma) load regulation (mv) figure 2. load regulation vs. output current v in = 14 v ?40 c 125 c 25 c 4.97 4.96 ?40 temperature ( c) output voltage (v) figure 3. output voltage vs. temperature v in = 14 v 4.98 4.99 5.00 5.01 5.02 5.03 5.04 ?20 0 20 40 60 80 100 120 14 0 20 ma 100 ma 100  a ?12 6 input voltage (v) line regulation (mv) figure 4. line regulation vs. input voltage i out = 100  a ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 12 8 10121416182022 2426 25 c ?40 c 125 c 0.3 0 output current (ma) quiescent current (ma) figure 5. quiescent current vs. output current (lightly loaded) v in = 14 v 0.4 0.5 0.6 0.7 0.8 0.9 1234 5678910 1 ?40 c 25 c 125 c 0 0 output current (ma) quiescent current (ma) figure 6. quiescent current vs. output current v in = 14 v 2 4 6 8 10 12 10 20 30 40 50 60 70 80 90 100 14 125 c ?40 c 25 c 0.30 4 input voltage (v) quiescent current (ma) figure 7. quiescent current vs. input voltage i out = 100  a 0.35 0.40 0.45 0.50 0.55 0.60 6 8 10 12 14 16 18 20 22 24 0.65 0.70 26 125 c ?40 c 25 c
cs9201 http://onsemi.com 4 circuit description voltage reference and output circuitry output stage protection the output stage is protected against overvoltage, short circuit and thermal runaway conditions (figure 8). if the input voltage rises above 32 v (typ), the output shuts down. this response protects the internal circuitry and enables the ic to survive unexpected voltage transients. should the junction temperature of the power device exceed 180 c (typ) the power transistor is turned off. thermal shutdown is an effective means to prevent die overheating since the power transistor is the principle heat source in the ic. figure 8. typical circuit waveforms for output stage protection load dump short circuit thermal shutdown v in v out i out > 32 v gnd v in v out cs9201 c 1 * 0.1  f * c1 is required if regulator is distant from power source filter. figure 9. application and test diagram application notes stability considerations / nocap normally a low dropout or quasi?low dropout regulator (or any type requiring a slow lateral pnp in the control loop) necessitates a large external compensation capacitor at the output of the ic. the external capacitor is also used to curtail overshoot, determine startup delay time and load transient response. traditional ldo regulators typically have low unity gain bandwidth, display overshoot and poor ripple rejection. compensation is also an issue and depends on the external capacitor value, esr (equivalent series resistance) and board layout parasitics that all can create oscillations if not properly accounted for. nocap is an on semiconductor exclusive output stage which internally compensates the ldo regulator over temperature, l oad and line variations without the need for an expensive external capacitor nocap is ideally suited for slow switching or steady loads. if the load is characterized by transient current events, an output storage capacitor may be needed. if this is the case, the capacitor should be no larger than 100 nf. with loads that require greater transient suppression, a regulator with a traditional output stage (such as the cs8221) may be better suited for proper operation.
cs9201 http://onsemi.com 5 calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 10) is: p d(max)  { v in(max)  v out(min) } i out(max)  v in(max) i q (1) where: v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i out(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i out(max) . once the value of p d(max) is known, the maximum permissible value of r  ja can be calculated: r  ja  150 c  t a p d (2) figure 10. single output regulator with key performance parameters labeled. i in i out i q cs9201 v ou t v in the value of r  ja can then be compared with those in the package section of the data sheet. those packages with r  ja ?s less than the calculated value in equation 2 will keep the die temperature below 150 c . in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heatsink will be required. heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r  ja : r  ja  r  jc  r  cs  r  sa (3) where: r  jc = the junction?to?case thermal resistance, r  cs = the case?to?heatsink thermal resistance, and r  sa = the heatsink?to?ambient thermal resistance. r  jc appears in the package section of the data sheet. like r  ja , it too is a function of package type. r  cs and r  sa are functions of the package type, heatsink and the interface between them. these values appear in heat sink data sheets of heat sink manufacturers.
cs9201 http://onsemi.com 6 package dimensions soic?8 nb case 751?07 issue ah seating plane 1 4 5 8 n j x 45  k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751?01 thru 751?06 are obsolete. new standard is 751?07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ?x? ?y? g m y m 0.25 (0.010) ?z? y m 0.25 (0.010) z s x s m  1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155  mm inches  scale 6:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, r epresentation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 cs9201/d nocap is a trademark of on semiconductor, and is patented. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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